A. Field of the Invention
The present invention relates to a vertical semiconductor device using gallium nitride semiconductor and a manufacturing method thereof.
B. Description of the Related Art
A silicon single crystal has been previously used for the material for a power semiconductor device that controls a high breakdown voltage and a large electric current. There are many kinds of power semiconductor devices which are manufactured. They have their respective advantages and disadvantages, so that currently they are separately used according to the purpose of the usage. For example, devices such as a bipolar transistor or an IGBT (Insulated Gate Bipolar Transistor) can be operated with large current densities, but there are limitations in their high speed switching operations. Their limiting switching frequencies are said to be several kilohertz in bipolar transistors and 20 kHz to 30 kHz in IGBTs. While devices such as power MOSFETs and Schottky barrier diodes can not be operated with a large current, they can be operated at higher speed up to higher frequency regions of several megahertz. In the market for power semiconductor devices, however, there is a strong requirement for a power device that can be operated with a large current at a high speed. Therefore, for devices such as IGBTs and power MOSFETs, efforts have been concentrated particularly on improvement in their switching speeds. As a result, it is said that their switching speeds have reached those close to the limits for materials being used as explained in the foregoing. Nevertheless, the switching speeds have not reached required levels.
A gallium nitride (GaN) semiconductor has an energy gap as high as 3 eV or more, with which development of photonic devices such as blue LEDs (Light Emitting Diodes) and blue LDs (Laser Diodes) have been implemented previously. However, a gallium nitride (GaN) semiconductor has features that its breakdown voltage is high and its maximum allowable electric field strength is also one order higher than that of silicon. This enables GaN to be the material for a power device having low on-resistance and used for high speed switching. Therefore, in the last few years, research and development for applying GaN to such a power device have been actively pursued. A switching device using gallium nitride (GaN) as its material has been generally known up to now as a HEMT (High Electron Mobility Transistor) device in which GaN is grown on a sapphire substrate. The HEMT device, having a characteristic of high electron mobility, is characterized in that on-resistance becomes significantly low. The device uses a sapphire substrate as an insulator, and all of the electrodes for taking out electric current must be provided on the top surface side of the GaN layer. Therefore, the HEMT device inevitably has a lateral device structure (JP-A-2004-31896, corresponding to U.S. Pat. No. 6,768,146).
As was explained in the foregoing, an HEMT device, having a lateral device structure, can be made to be resistant to a high breakdown voltage. However, because of the structure electric current flows only in the vicinity of the surface of the device. This is liable to cause a non-uniform current distribution and liable to increase the wiring resistance of the surface electrode of the device. For these reasons, it is difficult to make a device with a large current capacity. Therefore, a semiconductor device with the above explained structure in which a gallium nitride (GaN) layer is grown on a sapphire substrate is unsuitable for a vertical device having a structure in which electrodes for taking out current are respectively provided on the top surface and the bottom surface of the device so that a uniform current easily flows longitudinally (in the direction of the thickness) in the device. Nevertheless, a study of a vertical HEMT device using no sapphire substrate has also been performed, in which device a GaN layer is epitaxially grown on a gallium nitride (GaN) substrate and a HEMT structure is formed in the GaN layer, for example (Masakazu Kanechika et al., “A Vertical Operation of Insulated Gate AlGaN/GaN-HFETs,” EDD-06-104, Transactions of the Study Meeting, the Institute of Electrical Engineers of Japan, pp. 21-24 (2006)).
The GaN substrate used for the vertical HEMT described in the above document has drawbacks in that it is so expensive and so difficult to enlarge the diameter of its wafer that it is basically unsuitable for mass production using the large diameter wafers necessary for reducing device costs. Thus, many attempts have been made to develop semiconductor devices by using substrates in each of which a GaN layer is epitaxially grown on a silicon substrate that is, in addition to being inexpensive, field proven in enlarging its wafer diameter. Success in these developments will enable production of high performance semiconductor devices having the same mass productivity as that of current silicon power semiconductor devices. At present, however, when a GaN layer is grown directly on a silicon substrate, the difference in lattice constant between a silicon crystal and a GaN crystal causes crystalline defects in the GaN crystal. This induces dislocation in the GaN crystal from the interface between the silicon substrate and the GaN layer. The dislocation causes a considerably large leak current in a turned-off state of the device, which is a fatal problem for an electronic device. In order to counter the problem, a measure is known by which a buffer layer such as an aluminum nitride (AlN) layer is provided between the silicon substrate and the GaN layer to enhance the crystallinity of the GaN layer and avoid the problem of causing the large current leakage (JP-A-2003-60212 and JP-A-5-343741 (corresponding to U.S. Pat. No. 5,239,188)).
Furthermore, a manufacturing method is known in which trenches are formed on a silicon semiconductor substrate beforehand and n− GaN layers are thereafter grown thereon as shown in FIG. 6 as a cross sectional view of a principal part of a silicon semiconductor substrate with GaN layers formed thereon (JP-A-2006-165191). According to the description of JP-A-2006-165191, the GaN layer, being formed on the trench by a lateral selective growth method at GaN crystal growth, can reduce occurrence of dislocation due to difference between the lattice constant of GaN crystal and that of silicon crystal.
Moreover, a semiconductor device using a GaN semiconductor is also known which has a structure with an electrode formed on the exposed bottom of each trench which is provided by selectively removing a portion of a silicon semiconductor substrate in trench-like from the bottom surface thereof (Japanese Patent No. 3634627). In addition, it is known that a metal sulfide thin film provided as a buffer layer between a silicon substrate and a GaN semiconductor layer enables the sulfide layer to be epitaxially grown on the silicon substrate without forming an amorphous layer at the interface between the buffer layer and the silicon substrate (JP-A-2002-3297).
However, because of a considerably wide band gap (6.2 eV) of the AlN layer, the structure of using an AlN layer as a buffer layer causes the resistance of the AlN layer to become high. As a result, when an electric current is made to flow vertically, the resistance of the whole semiconductor layer is determined by the resistance in the AlN layer. Namely, there newly arises a problem of causing an on-voltage to become considerably high.
Moreover, in the manufacturing method described in JP-A-2006-165191, as shown in FIG. 6 as a cross sectional view of the principal part of the silicon semiconductor substrate with GaN layers formed thereon, trenches 6 are already provided on the surface of silicon semiconductor substrate 1 before GaN layer 5 is epitaxially grown on the surface of silicon semiconductor substrate 1. This causes GaN layer 5 to be formed not only on the surface of silicon semiconductor substrate 1, but also on the inner surfaces of trenches 6. However, for silicon semiconductor substrate 1, a wafer with a (111) plane taken as its principal surface is used for matching a lattice constant to that of the GaN layer formed thereon. Thus, the silicon surface of the sidewall in trench 6 becomes no (111) plane. Therefore, GaN layer 5-1 formed on the side wall has many lattice defects which are liable to cause dislocation. Moreover, GaN layer 5-1 on the side wall of trench 6 has a high possibility of remaining in the semiconductor device until the manufacturing process is completed. Hence, the dislocation introduced in GaN layer 5-1 on the sidewall of trench 6 has a possibility of causing a leak current. Furthermore, in a GaN crystal formed by a lateral selective growth method, a so-called grain boundary 11 is liable to appear on an interface at which adjoining laterally grown layers are butted against each other on the surface of the substrate plane. As a result, there is a concern that when metal 7 is buried in the trench in the subsequent process, metal 7 may reach the surface of n− GaN layer 5 through grain boundary 11 to cause a short-circuit fault between electrodes.
The present invention is made in view of the points explained in the foregoing and it is an object of the invention to provide a gallium nitride semiconductor device that can be easily manufactured as a vertical semiconductor device in which an electric current flows in the direction of the thickness of the substrate regardless of resistance values of gallium nitride grown layers and buffer layers, and a manufacturing method of the device.